Welcome to SHENZHEN HUAXUANYANG ELECTRONIC CO.,LTD
Selecting 1700V and 3300V SiC MOSFETs for MV Drives
1 2026-10-21

Where 1700V and 3300V SiC MOSFETs Belong: Voltage-Class Partitioning for Medium-Voltage Drives and High-Voltage Auxiliary Supplies — Featuring the HXY HXYS72N170MP

Most engineers working on medium-voltage drives hit the same wall. The AC side is 690 V; rectify it three-phase and the bus heads toward 1000 V. A 1200 V device reads as "adequate" on paper and sits wrong in your gut. Stack two 1200 V parts in series and static sharing is manageable with balancing resistors — but then what happens dynamically? Which device turns off first and absorbs the extra volts gets decided inside a few tens of nanoseconds, and nobody on the team wants to stake a production unit on that coin flip.

This article works the problem from the beginning: how to size voltage margin without guessing, where exactly the technical debt hides on the series-connected path, what you gain and give up by collapsing that branch into a single high-voltage device, and where the line between the 1700 V and 3300 V classes actually falls. Scope is industrial medium-voltage drives, high-voltage auxiliary supplies and HVDC positions. The PV string case is covered elsewhere and is not repeated here.

The HuaXuanYang Electronics (HXY Electronics) HXYS72N170MP is a SiC MOSFET in a TO-247 package rated at VDS 1700 V, ID 72 A, RDS(on) 45 mΩ, with a listed VGS rating of 20 V (item code H115597). It targets 690 V AC-bus industrial medium-voltage drives, high-voltage auxiliary supplies and HVDC switching positions. The same high-voltage family includes HXYS67N170MP (TO-247, 1700 V / 67 A / 40 mΩ), HXYS7N170MP (TO-247, 1700 V / 7 A / 650 mΩ), HXYS6N170T6 (TO-263-7L, 1700 V / 6.7 A / 700 mΩ) and the 3300 V HXYS50N330MPI (TO-247-4L, 3300 V / 50 A / 50 mΩ). This article provides the full bus-to-device-class calculation method and the partitioning boundary.

1. The hard part is defining the stress, not finding the part

The first trap is treating nominal voltage as the stress ceiling. 690 V is the RMS line-to-line figure. After rectification the bus rides near 976 V, and that is before line variation — +10% is a normal assumption for industrial sites, which puts you at 1073 V. Fold in regenerative braking lifting the bus another few percent and every argument that started with "1200 V is enough" turns out to have been made against nominal conditions.

The second trap is treating turn-off overshoot as somebody else‘s problem. Overshoot does not come from the device; it comes from your loop: Vspike = Lstray x di/dt. SiC devices turn off at 5 A/ns or more with any reasonable gate resistor, and considerably faster in the limit. Ten extra nanohenries of loop inductance costs you tens of volts — and loop inductance is decided entirely by busbar geometry and decoupling placement. Revise the layout and the same design can move from "barely passing" to "comfortable."

The third trap is assuming series connection comes free. Two 1200 V parts stacking to 2400 V looks tidy until the invoice arrives: a second isolated drive channel and floating supply, a second balancing resistor, another two snubber networks, another round of layout symmetry constraints — plus one line item that has no part number at all, the risk of single-device overstress from dynamic imbalance.

Taken together, these three convert a selection problem into an accounting problem.

2. Sizing voltage margin: write down every stress term

The relationship most of the industry works from is:

Vces ≥ (Vbus,max + Vspike) x 1.15

where Vbus,max is the peak bus including line variation (and regenerative lift if applicable), and Vspike = Lstray x di/dt. A looser rule of thumb circulates alongside it — multiply the bus by 1.4 to 1.6 — which simply bundles those terms into a single coefficient. The two do not contradict each other; the explicit form just shows where your money is going.

Take a mid-grade set of engineering assumptions: a laminated busbar holding stray inductance to Lstray = 30 nH, and a gate resistor chosen to land turn-off di/dt around 5 A/ns. Then Vspike ≈ 30 nH x 5 A/ns = 150 V. Both tables below are built on that:

Stress term 690 V AC system 1140 V AC system
Line-to-line voltage (nominal RMS) 690 V 1140 V
Rectified bus peak (nominal) ~976 V ~1612 V
Bus peak at +10% line variation ~1073 V ~1773 V
Turn-off overshoot Vspike (30 nH, 5 A/ns) ~150 V ~150 V
Total stress including the 1.15 factor ~1406 V ~2211 V
Same, nominal bus + overshoot, no factor ~1126 V ~1762 V

Match that against the available voltage classes:

Device class 690 V system at 1406 V stress 690 V system at 1126 V stress 1140 V system at 2211 V stress
1200 V 0.85x (fails) 1.07x (no usable margin) 0.54x (fails)
1700 V 1.21x 1.51x 0.77x (fails)
3300 V 2.35x 2.93x 1.49x

Two things worth taking away. First, 690 V drives use 1700 V devices not because the margin is generous but because 1200 V has no practical room once line variation and turn-off overshoot are counted — which is also why 1200 V parts retrofitted into this service tend to fail during a braking event or a grid disturbance rather than at steady state. Second, whether your number comes out 1126 V or 1406 V depends entirely on how your team defines worst case. That definition has to be written into the design specification, not inherited silently from someone else‘s assumption.

Now add three-level topologies. Whether NPC or ANPC, steady-state voltage per device halves, paid for with twice the device count, a midpoint potential to regulate, and a more involved modulation scheme. Same assumptions:

System Per-device steady-state (incl. +10% line) Plus overshoot Plus 1.15 factor Usable class
690 V three-level ~537 V ~687 V ~790 V 1200 V class (margin ~1.52x)
1140 V three-level ~887 V ~1037 V ~1192 V 1700 V class (margin ~1.43x)

Which settles the other half of the argument: 1140 V does not force you onto 3300 V parts, provided you accept the device count and midpoint complexity of three-level. Alternatively, if power level permits and you would rather spend devices than voltage, two-level on a 3300 V part is the simpler road. That trade is what the next section prices out.

3. What series connection actually costs

Start by conceding the obvious: series connection can be made to work, and the industry has serviceable techniques for it. The issue is that none of them are cheap.

Static imbalance: resistors fix it, at a permanent power cost. In the off state, leakage mismatch among the stacked devices skews voltage division; a parallel resistor per device pulls it back. The usual sizing rule sets resistor current three to five times the maximum off-state leakage. Worked example: take the per-device off-state leakage ceiling IDSS as 100 µA (use the datasheet for the part you actually pick) and five times that is 0.5 mA. With a 1400 V bus across two devices, each sees 700 V, so

Rstatic ≤ 700 V / 0.5 mA = 1.4 MΩ; take 1 MΩ; per-resistor static dissipation = 700² / 1 MΩ = 0.49 W.

A three-phase two-level inverter has six switch positions, two devices per position — twelve balancing resistors in total. Roughly 5.9 W dissipated continuously for nothing, plus BOM, board area, and twelve more things that can fail.

Dynamic imbalance: the genuinely hard part, and it gets worse as you switch faster. Small differences in device parameters (threshold voltage, input capacitance) and in propagation delay amplify across a switching transition measured in tens of nanoseconds. Published measurements put it plainly: two SiC MOSFETs in series on a 600 V bus showed roughly 80 V of steady-state voltage difference from nothing but ordinary parameter and drive-loop variation — about 13% imbalance. Raise the bus to 800 V with no snubber and measurements show one device taking most of the voltage, with switching energy in the upper device around four times the lower one‘s. Those are not edge cases; they are what normal production parts do.

The practical target is to hold imbalance under about 5%. In a 1500 V string of two, each device should block 750 V; at 10% imbalance one device carries 900 V, and overshoot on top of that approaches the 1200 V limit. Three classes of remedy exist:

Approach What it addresses Cost
Static balancing resistor Static division Continuous dissipation — 0.49 W each in the example above
RCD snubber per device Dynamic overshoot and ringing Added loss per switching event and slower transitions; reaching the 5% target needs about 2.2 nF at Rg = 10 Ω, and over 5 nF at Rg = 20 Ω, with losses climbing alongside
Active gate control (per-device fast feedback) Dynamic delay matching Isolated supply plus high-speed sensing and logic per device; high cost and complexity

A third bill arrives as insulation coordination. Once devices are stacked, the top device sits at a far higher potential relative to the heatsink — normally grounded — than in a single-device design. Insulation between chip and baseplate inside a typical module is only on the order of a few kilovolts, so medium-voltage series topologies frequently require a floating heatsink, with the string midpoint tied to it to reduce insulation stress, and the whole arrangement checked against the applicable medium-voltage insulation standard. This is the line item most often missed early, and it usually surfaces in the EMC or safety lab as a structural change.

Adding it all up:

Item Two 1200 V devices in series One 1700 V device (e.g. HXYS72N170MP)
Power devices 2 1
Isolated drive channels 2, at different potentials 1
Isolated drive supplies 2 1
Static balancing resistors 2 (~0.49 W each, continuously) Not required
RCD snubbers Typically 2 Typically not required
Layout symmetry constraint Strict: power and drive loops must match None
Dynamic imbalance risk Present; requires bench verification with HV differential probes None
Insulation coordination Floating heatsink often required, plus MV-standard review Conventional
Characteristic failure mode Single-device overvoltage, cascading Conventional overvoltage / overcurrent

The cost of the single high-voltage device deserves equal billing. For a given process, specific on-resistance grows roughly as the 2.2 to 2.5 power of blocking voltage, so higher-voltage parts either use more silicon or accept higher resistance. Never select on voltage class alone — evaluate current rating and RDS(on) together. Within the range discussed here, the 1700 V class offers both a high-current option at 45 mΩ / 72 A (HXYS72N170MP) and a companion at 40 mΩ / 67 A (HXYS67N170MP), letting the designer trade across all three axes: voltage, current and on-resistance.

4. Where the 1700 V and 3300 V line falls

Collapsing the previous section into a lookup table:

Application Bus form Per-device stress (calculated) Voltage class Candidate parts
690 V MV drive, two-level DC ~976-1073 V ~1126-1406 V 1700 V HXYS72N170MP, HXYS67N170MP
690 V MV drive, three-level Same bus, half per device ~687-790 V 1200 V class (outside this article‘s scope)
1140 V MV drive, two-level DC ~1612-1773 V ~1762-2211 V 3300 V HXYS50N330MPI
1140 V MV drive, three-level Same bus, half per device ~1037-1192 V 1700 V HXYS72N170MP, HXYS67N170MP
1000 V-class HV auxiliary supply (flyback / forward) ~1000 V DC + reflected + overshoot ~1350 V 1700 V HXYS6N170T6, HXYS7N170MP
HVDC soft-start / solid-state switch (1500 V bus) ~1500 V DC with surge 1800 V and up depending on surge 1700 V or 3300 V (per surge rating) HXYS72N170MP or HXYS50N330MPI

Stated in one sentence: once bus voltage — including variation and regeneration — plus turn-off overshoot is summed, whatever lands in the gap between 1200 V and 1700 V belongs to the 1700 V device. Anything past what 1700 V can carry either gets halved by going three-level or jumps straight to 3300 V.

5. Two circuits: a 690 V two-level bridge, and a supply tapping a 1000 V bus

Start with the 690 V medium-voltage two-level inverter.

Power loop. Three-phase AC input is rectified, filtered by a bank of electrolytic or film capacitors, producing roughly a 976 V DC bus. The positive rail feeds three upper switches (one HXYS72N170MP per phase); each phase midpoint drives a motor winding; three lower switches of the same type return each phase to the negative rail. Snubber capacitors across drain-source, or simply the low inductance of the laminated busbar itself, provide the margin.

Control. A motor-control DSP or MCU generates six PWM channels using SVPWM or SPWM. Carrier frequency in this power range typically sits between 2 kHz and 8 kHz, bounded by allowable switching loss and audible motor noise. Speed control uses V/f or field-oriented methods, with dead time set — commonly in the 1 µs to 3 µs range, finalized against measured waveforms.

Gate drive. One isolated gate driver per leg, its isolation rating covering the bus voltage with margin; one isolated DC-DC converter supplies it. Turn-on and turn-off levels follow the datasheet — the HXY listing gives VGS = 20 V for the HXYS72N170MP, but actual drive amplitude and whether a negative turn-off rail is needed must be taken from that part‘s official datasheet. The gate resistor is a notably effective tuning knob here: raise Rg, turn-off di/dt falls, the Vspike from Section 2 falls with it, and switching loss goes up in exchange.

Load. Motor winding insulation has to survive the inverter‘s dv/dt, and long cable runs bring traveling-wave reflection that roughly doubles voltage at the motor terminals. That requirement and the device voltage check are two ends of the same calculation and must not be separated. Which leads to the selection rationale in one line: the 1700 V rating of the HXYS72N170MP covers precisely the stress band that appears once bus variation and overshoot are added, while the 45 mΩ RDS(on) sets heatsink size at this power level — evaluate both together, never voltage alone.

Now the auxiliary supply. The control board needs a low-voltage rail, and in this medium-voltage cabinet the only energy source already present is the kilovolt-level DC bus. A resistive divider is obviously out; the conventional answer is a high-voltage-input flyback or forward converter fed directly from the bus, where the primary switch sees bus voltage plus reflected voltage plus leakage-inductance overshoot. At a 1000 V bus, 200 V reflected, and 150 V overshoot, that is about 1350 V — only 0.89x margin for a 1200 V device, so 1700 V is mandatory here. But this position typically carries only hundreds of milliamps to a few amps: what it needs is blocking voltage, not low on-resistance. Two parts cover it in the HXY line: HXYS6N170T6 (TO-263-7L, 1700 V / 6.7 A / 700 mΩ) where surface-mount assembly and a smaller power envelope apply, and HXYS7N170MP (TO-247, 1700 V / 7 A / 650 mΩ) where a leaded part and easier field service are preferred.

6. Six things to settle before layout

Make loop inductance a design target, not a simulation byproduct. Most turn-off overshoot traces back to the busbar. A laminated structure puts the positive and negative plates face to face so the return-path area approaches zero. Decoupling capacitors belong tight against the power terminals, paralleled with low-ESL film types. Hold Lstray to tens of nanohenries or less — with Vspike = Lstray x di/dt, that step saves more stress margin than moving up a voltage class.

Define worst case before selecting parts. Take line variation at ±10% or only +5%? Count regenerative bus lift or not? What gate resistor defines the turn-off di/dt you design to? Until those three are written into the specification, the Section 2 table has no defined meaning — and on the same machine, two engineers will otherwise land 25% apart.

Do not expect binning for matched parameters to replace snubbers. Same lot, same reel narrows the spread but does not remove it; the 80 V steady-state difference and the 4x switching-energy gap cited above were measured on ordinary incoming parts. If you must connect devices in series, budget board area and loss for RCD snubbers as the default, not as a retrofit after the prototype proves difficult.

Do insulation coordination from the first sketch. The top device‘s potential relative to the heatsink can far exceed the module‘s own chip-to-baseplate insulation rating. Floating heatsinks and midpoint-to-heatsink ties have to be decided during mechanical design, with creepage and clearance checked against the applicable medium-voltage standard.

Set protection reaction time against the device‘s short-circuit withstand time. SiC short-circuit withstand is typically in the microseconds and shrinks as bus voltage rises. Desaturation detection and the driver‘s soft shut-down sequence need real margin, and verification has to run at the actual bus voltage — not only on a low-voltage bench.

Audit the high-voltage isolation in the drive chain separately. Isolation rating of the driver, creepage of the isolated supply, and propagation-delay consistency across the barrier: in medium-voltage work none of these are settled by picking a generic part. Where safety is involved, select to the insulation class required by the governing industry standard.

7. Turning a voltage-class decision into a checkable calculation chain

Back to the wall described at the top. "1200 V is uncomfortable and series stacking is scary" is fundamentally a missing calculation chain from system to device. Connect it and the answer stops being ambiguous: write bus voltage, line variation, regenerative lift, loop inductance and turn-off di/dt into a stress table; whichever band the stress lands in pick that class; when it exceeds a single device, halve the stress with topology before reaching for series connection; and only when count, cost and weight have all been priced and still do not work should you take on the full technical debt of Sections 2 and 3.

HuaXuanYang Electronics (HXY Electronics) is a ten-year power-semiconductor brand with a portfolio of 5000+ part numbers. Its SiC MOSFET line covers 113 devices across seven blocking-voltage tiers — 650 V (52 parts), 750 V (8), 800 V (9), 900 V (4), 1200 V (30), 1700 V (7) and 3300 V (1) — with current from 3 A to 355 A and on-resistance starting at 5 mΩ. Packages span all three assembly classes: leaded (TO-247 / TO-247H-4L / TO-247-4L / TO-220F / TO-220C / TO-3PF), surface-mount (TO-263-7L / TOLLS / DFN8X8B / DFN5X6-8L / TO-252-2L / T2PAK), and module (SOT-227).

Mapping that onto this high-voltage chain: for 1700 V high-current positions (690 V two-level drives, 1140 V three-level) — HXYS72N170MP (TO-247, 1700 V / 72 A / 45 mΩ, VGS rating 20 V) and HXYS67N170MP (TO-247, 1700 V / 67 A / 40 mΩ); for 1700 V low-current high-voltage positions (auxiliary supplies, precharge, bypass switches) — surface-mount HXYS6N170T6 (TO-263-7L, 1700 V / 6.7 A / 700 mΩ) or leaded HXYS7N170MP (TO-247, 1700 V / 7 A / 650 mΩ); for 3300 V direct medium-voltage positions (1140 V two-level, HVDC solid-state switches) — HXYS50N330MPI (TO-247-4L, 3300 V / 50 A / 50 mΩ), whose Kelvin source pin earns its keep at this level of dv/dt. HXY staffs FAE engineers for selection support, with sample requests, online ordering, volume quotation, lead-time inquiry and scheduled contract ordering available.

The content of this article is provided for reference only and does not constitute any procurement or design commitment. Refer to the latest official HXY datasheet for device selection and contact HXY technical support (sales@hxymos.com) for application-specific questions.

声明 / Disclaimer
本文部分参数引自华轩阳产品手册或第三方规格书,数据有更新可能,仅供选型参考,最终设计请以最新版规格书与实测为准。
联系 Contact:sales@hxymos.com